Different vendors produce different FPGA devices using different technologies for different application domains. Unsurprisingly, this means that there is not one single architecture used by all FPGA devices.
The basic building blocks which are characteristic for an FPGA are mostly the same however. These building blocks are generally

  1. Programmable blocks for arbitrary combinatorial logic functions. These programmable blocks usually constitute look-up tables (LUTs), which are used to implement user-defined logic functions.
    Note that programmable blocks sometimes contain optimizations to improve performance for common use cases, e.g. wide multiplexers or fast carry chains. These optimizations usually consist of dedicated connectivity between neighbouring programmable blocks, e.g. a dedicated path to quickly propagate a carry bit from one LUT to the next to improve the implementation of adders.
  2. Storage blocks for sequential logic functions. These blocks usually constitute D-Flipflops with varying sets of control lines (like reset).
    Latches can be implemented as well, but are only ever used in very specific use cases. In most cases latches are to be avoided in FPGAs.
  3. Fixed blocks for specialized functions. Whilst the specialized functions offered by these blocks can generally also be provided by the general programmable blocks, this usually would incure heavy resource costs. Offering the specialized function blocks allows implementation of the respective function in a very efficient way and saves general programmable blocks for other tasks. The specialized function blocks usually include
    block memory (BRAM): a specialized memory block which provides the storage equivalent of many D-Flipflops. Often with single-port (SP) or dual-port (DP) configuration, which allows to access only one or two of the stored elements at the same time.
    first-in first-out (FIFO): a special memory block – without random access capability – for clock domain crossing or data queues. Mostly implemented as a BRAM with some special FIFO logic around it.
    digital signal processors (DSPs): a specialized arithmetic block which provides optimized addition/multiplication. Important when implementing digital filters at high sampling rates.
  4. Blocks of hardened functionality. This can include a very wide range of special feature blocks, e.g. a (multi-core) processor, memory controllers, PCIe endpoints, low speed serial protocol controllers (SPI, I2c, UART), ADCs, DACs and many others. These blocks can indicate that an FPGA is intended for a certain application, which requires these blocks.

Look-Up Table (LUT)

TODO

D-Flipflop (DFF)

TODO

Block RAM (BRAM)

TODO

Digital Signal Processor (DSP)

TODO