Writing HDL code for a digital circuit to perform a certain task is only one part of the job of a digital design / FPGA / ASIC engineer. Another very important step is to make sure that the HDL description and the resulting digital circuit does perform the intended task correctly. This is the purpose of verification.
Verification is the process of checking or proving that a system meets it’s specification. There are a multitude of ways to do this and whole believe systems have evolved around some verification methodologies.
The following pages are meant to provide a broad overview of the most popular verification methods, their similarities and differences.